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Homepage zu dem Seminar für eingebettete Systeme im WS 06/07

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Berechnung von Ausführungszeit-Schranken und Entwicklungsumgebungen für Eingebettete Systeme

Termine

Durchführung 13.2.-15.2.2007, jeweils 9:00-18:00

Themen

  1. 13.2. Software-Entwicklungsumgebungen für Eingebettete Systeme I
    Telelogic: Telelogic Tau G2, http://www.telelogic.de/products/tau/g2/specifications.cfm
  2. 13.2. Software-Entwicklungsumgebungen für Eingebettete Systeme II
    I-logix: Rhapsody, http://www.ilogix.com/sublevel.aspx?id=53
  3. 13.2. Automotive Open System Architecture (AUTOSAR)
    AUTOSAR Consortium, Technical papers, http://www.autosar.org/find02_ns6.php
  4. 13.2. Das IP Multimedia-Subsystem (IMS) von Mobilfunkgeräten der dritten Generation
    Gonzalo Camarillo, Miguel A. Garcia-Martin, Miguel A. Garcia-Martin:The 3G IP Multimedia Subsystem (IMS). Merging the Internet and the Cellular Worlds, Wiley & Sons; Auflage: 2nd (Dez. 2005)
    oder eine Text-Quelle eigener Wahl
  5. 13.2. Real-time calculus for scheduling hard real-time systems
    L. Thiele, S. Chakraborty, M. Naedele: Real-time calculus for scheduling hard real-time systeme, Proc. IEEE International Conference on Circuits and Systems, 2000
    Balaji Raman, Samarjit Chakraborty, and Wei Tsang Ooi, Meeting CPU Constraints by Delaying Playout of Multimedia Tasks, International Workshop on Network and Operating Systems Support for Digital Audio and Video (NOSSDAV), Skamania, Washington, June 2005
  6. 14.2. Symbolische Laufzeitanalyse für Prozesse - Symta/P
    Jan Staschulat, Simon Schliecker, Rolf Ernst. Scheduling Analysis of Real-time Systems with Precise Modeling of Cache Related Preemption Delay. In Euromicro Conference on Real-Time Systems (ECRTS), Palma de Mallorca, Spain, July 2005.
    Jan Staschulat, Rolf Ernst. Scalable Precision Cache Analysis for Preemptive Scheduling. In Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), Chicago, USA, June 2005.
    Jan Staschulat, Rolf Ernst. Multiple Process Execution in Cache Related Preemption Delay Analysis. In ACM International Conference on Embedded Software (EMSOFT), pages 278-286. Pisa, Italy, September 2004
  7. 14.2. Symbolische Laufzeitanalyse für Systeme - Symta/S
    Rafik Henia, Arne Hamann, Marek Jersak, Razvan Racu, Kai Richter, Rolf Ernst. System Level Performance Analysis - the SymTA/S Approach. IEE Proceedings Computers and Digital Techniques, 2005.
    M. Jersak, R. Henia, R. Ernst. Context-Aware Performance Analysis for Efficient Embedded System Design. In Proceeding Design Automation and Test in Europe, Paris, France, March 2004
  8. 14.2. Bestimmung von worst case execution times (WCETs) für moderne Prozessoren
    Eisinger J., Polian I., Becker B., Metzner A., Thesing S., and Wilhelm R. "Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis". 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems. pp. 15-20. IEEE Computer Society, 2006
    Stephan Wilhelm: Efficient Analysis of Pipeline Models for WCET Computation, Proceedings of the 5th Intl Workshop on Worst-Case Execution Time (WCET) Analysis, http://artist.cs.uni-sb.de/WCET05/Papers/WCET2005Proceedings.pdf
  9. 14.2. Test-basierte Bestimmung von worst case execution times (WCETs)
    Jean-François Deverge and Isabelle Puaut : Safe measurement-based WCET estimation, Proceedings of the 5th Intl Workshop on Worst-Case Execution Time (WCET) Analysis, http://artist.cs.uni-sb.de/WCET05/Papers/WCET2005Proceedings.pdf
    Nicky Williams: WCET measurement using modified path testing: Proceedings of the 5th Intl Workshop on Worst-Case Execution Time (WCET) Analysis, http://artist.cs.uni-sb.de/WCET05/Papers/WCET2005Proceedings.pdf
  10. 14.2. Software-Controlled Caches I
    Isabelle Puaut: WCET-Centric Software-controlled Instruction Caches for Hard Real-Time Systems, http://www.irisa.fr/caps/publications/pdfs/puaut-SoftwareControlledCaches.pdf
    Isabelle Puaut: Cache analysis vs static cache locking for schedulability analysis in multitasking real-time systems; http://www.cs.york.ac.uk/rts/wcet2002/papers/puaut.pdf
  11. 15.2. Software-Controlled Caches II
    Xavier Vera, Björn Lisper, Jingling Xue: : Data Cache Locking for Higher Program Predictability, SIGMETRICS, 2003, S. 272-282
    Bernhard Egger, Jaejin Lee, and Heonshik Shin: Scratchpad Memory Management for Portable Systems with a Memory Management Unit, CASES, Nov. 2006 (Veröffentlichung über Lehrstuhl erhältlich)
  12. 15.2. WCET-Analyse von Caches
    Christian Ferdinand, Florian Martin, Reinhard Wilhelm: Applying Compiler Techniques to Cache Behavior Prediction, Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Real-Time Systems, S. 37-46, 1997.
    Reinhard Wilhelm: Why AI + ILP is good for WCET, but MC is not, nor ILP alone, VMCAI 2004, volume 2937 of LNCS, S. 309-322, 2004.
  13. 15.2. Darstellung von Flussinformationen für die WCET-Analyse
    Andreas Ermedahl, Jakob Engblom, Freidhelm Stappert: A Unified Flow Information Language for WCET Analysis, 2 nd Workshop on Worst-Case Execution Time analysis (WCET¿2002),
    Jakob Engblom, Andreas Ermedahl, Peter Altenbernd: Facilitating Worst-Case Execution Times Analysis for Optimized Code, Proc. of the 10 Euromicro Workshop of Real-Time Systems, S. 146-153, 1998.
  14. 15.2. Optimierung der worst case execution time (WCET)
    Sheayun Lee, Jaejin Lee, Chang Yun Park, Sang Lyul Min: A flexible tradeoff between code size and WCET using a dual instruction set processor, SCOPES, 2004
    Wankang Zhao, William Kreahling, David Whalley, Christopher Healy, Frank Mueller: Improving WCET by Optimizing Worst-Case Paths, IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2005)
  15. 15.2. WCET-Analyse für Java
    Martin Schöberl, Rasmus Pedersen: WCET Analysis for a Java Processor, The 4th Workshop on Java Technologies for Real-time and Embedded Systems (JTRES 2006)
    Angelo Corsaro, Corrado Santoro: Optimizing JVM Object Operations to Improve WCET Predictability, http://www.irisa.fr/manifestations/2004/wcet2004/Papers/Corsaro.pdf