| English, page number |
German |
A |
|
| A/D-converter, 91 |
A/D-Wandler |
| ACID-property, 148 |
|
| actor, 17 |
Aktor |
| actuator, 2, 122 |
Aktuator |
| address generation unit, 108, 183 |
Adresserzeugungseinheit |
| address register, 182 |
Adressregister |
| ambient intelligence, 5, 99, 232 |
|
| application domains, 15 |
Anwendungsbereiche |
| application-specific circuit (ASIC), 98, 100 |
Anwendungs-spezifische Schaltung |
| arithmetic |
Arithmetik |
| fixed-point ~, 109, 157 |
Festkomma~ |
| floating-point ~, 157 |
Gleitkomma~ |
| saturating ~, 108, 109 |
Sättigungs~ |
| artificial eye, 90 |
künstliches Auge |
| availability, 2 |
Verfügbarkeit |
B |
|
| basic block, 195 |
Basisblock |
| behavior |
Verhalten |
| deterministic ~, 18, 25, 28, 72, 74 |
deterministisches ~ |
| non-deterministic ~, 27 |
nichtdeterministisches ~ |
| non-functional ~, 16 |
nicht-funktionelles ~ |
| real-time ~, 96 |
Realzeit ~ |
| Binary Decision Diagram (BDD), 81, 209, 210 |
Binäres Entscheidungsdiagramm |
| boundary scan, 204 |
|
| branch delay penalty, 114, 185 |
|
| broadcast, 26, 28, 30, 79 |
|
| building |
Haus |
| smart ~, 1, 7 |
intelligentes ~ |
C |
|
| cache, 110, 119 |
|
| CACTI cache estimation tool, 120 |
|
| causal dependence, 50 |
Kausale Abhängigkeit |
| channel, 17, 33 |
Kanal |
| charge-coupled devices (CCD), 89 |
Eimerketten-Schaltungen |
| clock synchronization, 145 |
Takt-Synchronisation |
| code size, 2, 181, 183 |
Codegröße |
| communication, 15, 29, 93 |
Kommunikation |
| blocking ~, 55 |
blockierende ~ |
| non-blocking ~, 29 |
|
| compiler, 177 |
Compiler |
| energy-aware ~, 178 |
|
| for digital signal processor, 181 |
|
| retargetable ~, 178, 185 |
retargierbarer ~ |
| composability, 144 |
|
| compression |
Kompression |
| dictionary-based ~, 105 |
|
| computer |
Computer |
| disappearing ~, xi, 1, 3 |
verschwindender ~ |
| computing |
|
| pervasive ~, 1, 5 |
|
| ubiquitous ~, 5 |
allgegenwärtiges, ubiquitäres ~ |
| concurrency, 15 |
Nebenläufigkeit |
| condition/event net, 40 |
Bedingungs-/Ereignisnetz |
| configurability, 143 |
Konfigurierbarkeit |
| configuration |
Konfiguration |
| link-time ~, 146 |
|
| context switch, 143, 154 |
Prozesswechsel |
| contiguous files, 145 |
|
| controller area network (CAN), 97 |
|
| cost, 3, 173 |
Kosten |
| estimated ~, 127 |
geschätzte ~ |
| function for scheduling, 130 |
|
| function of integer programming, 176 |
|
| model for energy, 179 |
Energiekostenmodell |
| model of COOL, 169 |
|
| model of integer programming, 171 |
Kostenmodell der Ganzzahligen Prog. |
| of ASICs, 100 |
|
| of CCDs, 89 |
|
| of communication, 94 |
|
| of damages, 207 |
|
| of energy, 100 |
|
| of floating point arithmetic, 109 |
|
| of second instruction set, 105 |
|
| of testing, 205 |
|
| of wiring, 97 |
|
| coverage, 202 |
(Fehler-) Abdeckung |
| critical section, 29, 140 |
Kritischer Abschnitt |
| CSA-theory, 63 |
CSA-Theorie |
| curriculum, xii |
Lehrplan |
| cyclic redundancy check (CRC), 204 |
|
D |
|
| D/A-converter, 121 |
D/A-Konverter |
| damage, 207 |
Schaden |
| dataflow, 17 |
Datenfluss |
| synchronous ~, 18, 196 |
synchroner ~ |
| deadline, 30, 128, 130, 132, 136, 138, 139, 145 |
|
| deadline interval, 131, 135 |
|
| dependability, 2, 14, 83, 145, 207 |
Verlässlichkeit |
| dependence graph, 50 |
Abhängigkeitsgraph |
| depletion transistor, 65 |
Verarmungstransistor |
| design flow, 10, 87, 151, 200 |
Entwurfsfluss |
| design for testability, 202 |
testfreundlicher Entwurf |
| design space estimation, 190 |
|
| design space exploration, 192 |
|
| diagnosability, 95 |
|
| diagrams |
Diagramme |
| of UML, 47 |
UML ~ |
| differential signaling, 95 |
|
| dining philosophers problem, 44 |
Problem der dinierenden Philosophen |
| discrete event, 17, 196 |
diskretes Ereignis |
| dispatcher, 129 |
|
| dynamic power management (DPM), 189 |
|
| dynamic voltage scaling (DVS), 101, 102, 186, 187, 192 |
|
E |
|
| efficiency, 2, 14, 94 |
Effizienz |
| code-size ~, 102 |
Codegrößen ~ |
| energy ~, 2, 101, 119 |
Energie ~ |
| run-time ~, 3, 105 |
Laufzeit ~ |
| electro-magnetic compatibility (EMC), 200 |
Elektromagnetische Verträglichkeit |
| Embedded system(s), 1 |
Eingebettetes System |
| hardware, 87 |
|
| market of ~, 8 |
|
| energy, 2, 99, 178 |
Energie |
| event, 14, 36, 40, 71, 79 |
Ereignis |
| exception, 14, 20, 21, 58, 78 |
Ausnahme |
| executability, 15 |
Ausführbarkeit |
F |
|
| failure mode and effect analysis (FMEA), 208 |
|
| fault |
Fehler |
| injection, 207 |
|
| model, 202, 205 |
~modell |
| simulation, 206 |
~simulation |
| tolerance, 94 |
~toleranz |
| tree, 208 |
~baum |
| tree analysis (FTA), 207 |
|
| field programmable gate arrays (FPGAs), 116, 194, 201 |
|
| FIFO, 17, 53, 54, 78 |
|
| in SDL, 32 |
|
| finite state machine (FSM), 16, 18, 20, 30, 31, 196, 210 |
endlicher Automat |
| communicating ~, 17 |
kommunizierender ~ |
| formal verification, 209 |
formale Verifikation |
G |
|
| garbage collection, 58, 145 |
|
| gated clocking, 101 |
|
| granularity, 52, 195 |
Granularität |
H |
|
| hardware description language, 59 |
Hardware-Beschreibungssprache |
| hardware in the loop, 88 |
|
| hardware/software codesign, 151 |
|
| hardware/software partitioning, 167, 190, 195 |
|
| hazard, 207 |
Gefährdung, Risiko |
| hierarchy, 13 |
Hierarchie |
| in SDL, 33 |
|
| in StateCharts, 19 |
|
| leaf, 169 |
|
| leaves, 20, 34 |
|
| history mechanism, 20 |
|
| homing sequence, 203 |
|
I |
|
| inlining, 185 |
|
| input, 14, 16, 19, 27, 30, 32, 51, 53--55, 60 |
Eingabe |
| input/output, 30 |
Ein-/Ausgabe |
| instruction level parallelism, 183 |
|
| instruction set architecture (ISA), 80 |
|
| instruction set level, 80 |
|
| integer programming, 170, 171, 181, 188, 189 |
Ganzzahlige Programmierung |
| intellectual property, 125 |
|
| interrupt, 144, 145 |
Unterbrechung |
J |
|
| job, 128, 135 |
Job |
K |
|
| Kahn process network, 53, 196 |
|
| knapsack problem, 181 |
Knappsack-/Rucksack-Problem |
L |
|
| lab, xiv |
Labor, Übung, Praktikum |
| language, 13 |
Sprache |
| synchronous ~, 27 |
synchrone ~ |
| laxity, 131, 135 |
Schlupf |
| locality, 161 |
Lokalität |
| logic |
Logik |
| first-order ~, 209 |
|
| higher order ~, 210 |
|
| multi-valued ~, 62 |
|
| propositional ~, 209 |
|
| reconfigurable ~, 115 |
|
| loop |
Schleife(n) |
| blocking, 160 |
|
| fission, 160 |
|
| fusion, 160 |
|
| permutation, 159 |
|
| splitting, 163 |
|
| tiling, 160 |
|
| unrolling, 160 |
-Abrollen |
M |
|
| maintainability, 2, 95 |
Wartbarkeit |
| marking, 41 |
Markierung |
| maximum lateness, 130 |
|
| memory, 118 |
Speicher |
| bank, 110 |
-bank |
| hierarchy, 180 |
-hierarchie |
| layout, 182 |
|
| message passing, 28 |
Nachrichtenaustausch |
| asynchronous ~, 17, 29 |
|
| synchronous ~, 18 |
|
| message sequence charts (MSC), 44 |
|
| microcontroller, 115 |
|
| middleware, 125 |
|
| model |
|
| discrete event ~, 17 |
|
| layout level ~, 82 |
|
| of computation, 16 |
|
| switch-level ~, 81 |
|
| module chart, 27 |
|
| multi-thread graph, 52 |
|
| multiply/accumulate instruction, 110 |
|
| mutex primitives, 140 |
|
| mutual exclusion, 37, 51, 145 |
gegenseitiger Ausschluss |
N |
|
| NP-hard, 209 |
NP-hart |
O |
|
| object orientation, 15, 196 |
Objektorientierung |
| open collector circuit, 63 |
|
| operating system |
Betriebssystem |
| driver, 143 |
|
| kernel, 146 |
|
| real-time ~, 125, 144 |
|
| optimization, 163, 168, 170--172, 178--181, 183--186, 190, 193 |
|
| high-level ~, 157 |
|
P |
|
| Pareto curves, 192 |
|
| period, 128 |
Periode |
| periodic schedules, 52 |
|
| Petri net, 36, 155 |
Petrinetz |
| place/transition net, 40 |
Stellen/Transitionen-Netz |
| platform-based design, 87, 125 |
|
| portability, 16 |
|
| post-PC era, xi, 9 |
|
| power, 99, 178 |
Leistung |
| power models, 179 |
Leistungsmodelle |
| pre-charging, 66 |
|
| pre-requisites, xii |
Voraussetzungen |
| predecessor, 50 |
Vorgänger |
| predicate/transition net, 42 |
Prädikat/Ereignis-Netz |
| predicated execution, 113, 185 |
|
| predictability, 126, 130, 140, 144, 149 |
Vorhersagbarkeit |
| prefetching, 161 |
|
| priority ceiling protocol, 143 |
|
| priority inheritance, 141 |
|
| priority inversion, 140 |
Prioritätsumkehr |
| privacy, 95 |
|
| processes, 28 |
Prozesse |
| processor, 100, 178 |
Prozessor |
| DSP-~, 108 |
|
| multimedia ~, 110, 184 |
|
| network ~, 185 |
|
| very long instruction word (VLIW) ~, 111 |
|
| VLIW ~, 184 |
|
| program |
|
| self-test ~, 205 |
|
| protection, 143 |
Schutz |
R |
|
| rapid prototyping, 201 |
|
| readability, 15 |
Lesbarkeit |
| real-time, 58 |
Realzeit |
| behavior, 94 |
|
| capability, 110 |
|
| constraint, 3 |
|
| data bases, 125, 148 |
|
| hard ~ constraint, 4 |
|
| kernel, 145 |
|
| real-time operating system (RTOS), 10, 127, 143--146, 148, 156 |
|
| register file, 110, 112, 183 |
|
| register-transfer level, 81 |
|
| reliability, 2 |
Zuverlässigkeit |
| rendez-vous, 29, 56 |
|
| resolution function, 64 |
|
| resource allocation, 147 |
Ressourcenbereitstellung |
| robotics, 7, 10 |
|
| robustness, 94, 95 |
Robustheit |
| row major order, 159, 161 |
|
S |
|
| safety, 2, 83, 143 |
Sicherheit |
| safety case, 208 |
|
| sample-and-hold circuit, 90 |
|
| scan design, 202 |
|
| scan path, 203 |
|
| schedulability tests, 130 |
|
| scheduling, 127, 128, 145 |
Ablaufplanung |
| dynamic ~, 129 |
|
| earliest deadline first ~, 139 |
|
| instruction ~, 180 |
|
| least laxity ~, 133 |
|
| non-preemptive ~, 128 |
|
| optimal ~, 135 |
|
| rate monotonic ~, 136 |
|
| scratch pad memory (SPM), 119, 181 |
|
| security, 2, 143 |
Sicherheit |
| select-statement, 57, 68 |
|
| semantics |
Semantik |
| sensor, 2, 88 |
Sensor |
| bio-metrical ~, 90 |
|
| image ~, 89 |
|
| sequence diagram, 47 |
|
| shared memory, 28 |
gemeinsamer Speicher |
| signal-to-noise-ration (SNR), 158 |
Signal-/Rauschabstand |
| signaling |
|
| differential ~, 96 |
|
| single-ended ~, 95 |
|
| SIMD-instructions, 110 |
|
| simulation, 200 |
Simulation |
| bit-true ~, 80 |
|
| cycle-true ~, 81 |
|
| slack, 131, 135 |
Schlupf |
| slides, xiv |
Folien |
| specification languages, 13 |
Spezifikationssprachen |
| sporadic task server, 140 |
|
| state |
Zustand |
| ancestor ~, 19 |
|
| AND-super ~, 21 |
|
| basic ~, 19 |
|
| default ~, 20 |
|
| diagram, 15, 18 |
|
| OR-super ~, 19 |
|
| super ~, 19 |
|
| stuck-at-fault, 202 |
Haftfehler |
| successive approximation, 92 |
|
| successor, 50 |
Nachfolger |
| synchronization, 15, 28 |
Synchronisation |
| system |
System |
| dedicated ~, 3 |
|
| embedded ~, 5 |
|
| hybrid ~, 4 |
|
| reactive ~, 4, 196 |
|
| time triggered ~, 129 |
|
| system level, 80 |
|
| system on a chip (SoC), 3, 58, 103, 167, 190 |
|
T |
|
| task |
Task, Prozess |
| aperiodic ~, 128 |
aperiodischer ~ |
| concurrency management, 152, 153, 192 |
|
| periodic ~, 128, 135 |
periodischer ~ |
| sporadic ~, 128, 130 |
|
| task graph, 50 |
Taskgraph |
| node splitting, 154 |
|
| termination, 16 |
Terminierung |
| test, 201 |
Test |
| testability, 202 |
Testbarkeit |
| time, 45, 50, 60, 69, 74, 78 |
Zeit |
| time services, 145 |
|
| timer, 23, 34 |
Timer |
| timing, 29 |
|
| timing behavior, 14 |
Zeitverhalten |
| timing information, 50 |
|
| transaction level modeling, 80 |
|
U |
|
| unified modeling language, 45 |
|
| user-interface, 3 |
Benutzerinterface |
V |
|
| validation, 199 |
Validierung |
| variable voltage processor, 188 |
|
| Verilog, 75 |
|
| architecture, 60 |
|
| entity, 60 |
|
| port map, 62 |
|
| signal driver, 64 |
|
W |
|
| weight, 3 |
|
| worst-case execution time, 126 |
|
Z |
|
| zero-overhead loop instruction, 107, 160, 184 |
|
