| Stefan Steinke, Rüdiger Schwarz, Lars Wehmeyer and Peter Marwedel.
Low power code generation for a RISC processor by register pipelining.
Technical Report #754, TU Dortmund, Faculty of Computer Science 12
2001
[BibTeX][PDF][Abstract]@techreport { steinke:2001:754,
author = {Steinke, Stefan and Schwarz, R\"udiger and Wehmeyer, Lars and Marwedel, Peter},
title = {Low power code generation for a RISC processor by register pipelining},
institution = {TU Dortmund, Faculty of Computer Science 12},
year = {2001},
type = {Technical Report},
number = {754},
keywords = {ecc},
file = {http://ls12-www.cs.tu-dortmund.de/daes/media/documents/publications/downloads/2001-TechReport-754.pdf},
confidential = {n},
abstract = {This paper presents the implementation of the compiler technique register pipelining with respect to energy optimization and its comparison against performance optimization. Generally, programs optimized for performance are also energy optimized. An exception to this rule is shown where the use of register pipelining improves the energy consumption by 17\% while bringing down performance by 8.8\%. Therefore, a detailed consideration of energy consumption within the processor and the memories is necessary.},
}
This paper presents the implementation of the compiler technique register pipelining with respect to energy optimization and its comparison against performance optimization. Generally, programs optimized for performance are also energy optimized. An exception to this rule is shown where the use of register pipelining improves the energy consumption by 17% while bringing down performance by 8.8%. Therefore, a detailed consideration of energy consumption within the processor and the memories is necessary.
|
| Stefan Steinke, Christoph Zobiegala, Lars Wehmeyer and Peter Marwedel.
Moving Program Objects to Scratch-Pad Memory for Energy Reduction.
Technical Report #756, TU Dortmund, Faculty of Computer Science 12
2001
[BibTeX][PDF][Abstract]@techreport { steinke:2001:756,
author = {Steinke, Stefan and Zobiegala, Christoph and Wehmeyer, Lars and Marwedel, Peter},
title = {Moving Program Objects to Scratch-Pad Memory for Energy Reduction},
institution = {TU Dortmund, Faculty of Computer Science 12},
year = {2001},
type = {Technical Report},
number = {756},
keywords = {ecc},
file = {http://ls12-www.cs.tu-dortmund.de/daes/media/documents/publications/downloads/2001-TechReport-756.pdf},
confidential = {n},
abstract = {This paper presents a new approach for improving energy consumption of compiler generated software by using on-chip Scratch-Pad RAM more efficiently. This memory allocation technique moves program parts (functions or basic blocks and global data objects) into the limited Scratch-Pad RAM. Experimental results show that this technique saves up to 80\% of the total energy consumption depending on the application, the system architecture and the size of the Scratch-Pad RAM.},
}
This paper presents a new approach for improving energy consumption of compiler generated software by using on-chip Scratch-Pad RAM more efficiently. This memory allocation technique moves program parts (functions or basic blocks and global data objects) into the limited Scratch-Pad RAM. Experimental results show that this technique saves up to 80% of the total energy consumption depending on the application, the system architecture and the size of the Scratch-Pad RAM.
|
| Peter Marwedel, Stefan Steinke and Lars Wehmeyer.
Compilation techniques for energy-, code-size-, and run-time-efficient embedded software.
In Int. Workshop on Advanced Compiler Techniques for High Performance and Embedded Processors
Bucharest, Hungary, 2001
[BibTeX][Abstract]@inproceedings { marwedel:01:iwact,
author = {Marwedel, Peter and Steinke, Stefan and Wehmeyer, Lars},
title = {Compilation techniques for energy-, code-size-, and run-time-efficient embedded software},
booktitle = {Int. Workshop on Advanced Compiler Techniques for High Performance and Embedded Processors},
year = {2001},
address = {Bucharest, Hungary},
keywords = {ecc},
confidential = {n},
abstract = {This paper is motivated by two essential characteristics of embedded systems: the increasing amount of software that is used for implementing embedded systems and the need for implementing embedded systems efficiently. As a consequence, embedded software has to be efficient. In the following, we will present techniques for generating efficient machine code for architectures which are typically found in embedded systems. We will demonstrate, using examples, how compilers for embedded processors can exploit features that are found in embedded processors.},
}
This paper is motivated by two essential characteristics of embedded systems: the increasing amount of software that is used for implementing embedded systems and the need for implementing embedded systems efficiently. As a consequence, embedded software has to be efficient. In the following, we will present techniques for generating efficient machine code for architectures which are typically found in embedded systems. We will demonstrate, using examples, how compilers for embedded processors can exploit features that are found in embedded processors.
|
| Lars Wehmeyer, Manoj Kumar Jain, Stefan Steinke, Peter Marwedel and M. Balakrishnan.
Analysis of the Influence of Register File Size on Energy Consumption, Code Size and Execution Time.
IEEE TCAD 20 11
November 2001
[BibTeX][PDF][Abstract]@article { wehm:01:conf,
author = {Wehmeyer, Lars and Jain, Manoj Kumar and Steinke, Stefan and Marwedel, Peter and Balakrishnan, M.},
title = {Analysis of the Influence of Register File Size on Energy Consumption, Code Size and Execution Time},
journal = {IEEE TCAD},
year = {2001},
volume = {20},
number = {11},
month = {nov},
keywords = {ecc},
file = {http://ls12-www.cs.tu-dortmund.de/daes/media/documents/publications/downloads/2001-tcad_LW.pdf},
confidential = {n},
abstract = {Interest in low power embedded systems has increased considerably in the past few years. To produce low power code and to allow an estimation of power consumption of software running on embedded systems, a power model was developed based on physical measurement using an evaluation board and integrated into a compiler and profiler. The compiler uses the power information to choose instruction sequences consuming less power, whereas the profiler gives information about the total power consumed during execution of the generated program. The used compiler is parameterized such that e.g. the register file size may be changed. The resulting code is evaluated with respect to code size, performance and power consumption for different register file sizes. The extracted information is especially useful during application analysis and architecture space exploration in ASIP design. Our analysis gives the designer the ability to estimate the desirable register file size for an ASIP design. The size of the register file should be considered as a design parameter since it has a strong impact on the energy consumption of embedded systems.},
}
Interest in low power embedded systems has increased considerably in the past few years. To produce low power code and to allow an estimation of power consumption of software running on embedded systems, a power model was developed based on physical measurement using an evaluation board and integrated into a compiler and profiler. The compiler uses the power information to choose instruction sequences consuming less power, whereas the profiler gives information about the total power consumed during execution of the generated program. The used compiler is parameterized such that e.g. the register file size may be changed. The resulting code is evaluated with respect to code size, performance and power consumption for different register file sizes. The extracted information is especially useful during application analysis and architecture space exploration in ASIP design. Our analysis gives the designer the ability to estimate the desirable register file size for an ASIP design. The size of the register file should be considered as a design parameter since it has a strong impact on the energy consumption of embedded systems.
|
| Bo-Sik Lee.
Vergleich des Energieverbrauchs von Cache- und Scratch-Pad-Speichern für den ARM7-Prozessor.
Master's Thesis, October 2001
[BibTeX][PDF]@mastersthesis { Lee2001,
title = {Vergleich des Energieverbrauchs von Cache- und Scratch-Pad-Speichern f\"ur den ARM7-Prozessor},
author = {Lee, Bo-Sik},
school = {Technische Universtit\"at Dortmund},
year = {2001},
month = {October},
keywords = {ecc},
file = {http://ls12-www.cs.tu-dortmund.de/daes/media/documents/theses/lee.ps.gz},
confidential = {n},
adviser = {Stefan Steinke},
} |
| Stefan Steinke, Markus Knauer, Lars Wehmeyer and Peter Marwedel.
An Accurate and Fine Grain Instruction-Level Energy Model Supporting Software Optimizations.
In PATMOS
Yverdon (Switzerland), September 2001
[BibTeX][PDF][Abstract]@inproceedings { steinke:01:patmos,
author = {Steinke, Stefan and Knauer, Markus and Wehmeyer, Lars and Marwedel, Peter},
title = {An Accurate and Fine Grain Instruction-Level Energy Model Supporting Software Optimizations},
booktitle = {PATMOS},
year = {2001},
address = {Yverdon (Switzerland)},
month = {sep},
keywords = {ecc},
file = {http://ls12-www.cs.tu-dortmund.de/daes/media/documents/publications/downloads/2001-patmos.pdf},
confidential = {n},
abstract = {Power aware compilers have been under research during the last few years. However, there is still a need for accurate energy models for supporting software optimizations. In this paper we present a new energy model on the instruction level. As an addition to former models, the bit toggling on internal and external buses as well as accesses to off-chip memories are considered. To determine the characteristics, a measuring method is presented which can be used to establish the energy model without detailed knowledge of the internal processor structures. Finally, the proposed energy model is established for the ARM7TDMI RISC processor.},
}
Power aware compilers have been under research during the last few years. However, there is still a need for accurate energy models for supporting software optimizations. In this paper we present a new energy model on the instruction level. As an addition to former models, the bit toggling on internal and external buses as well as accesses to off-chip memories are considered. To determine the characteristics, a measuring method is presented which can be used to establish the energy model without detailed knowledge of the internal processor structures. Finally, the proposed energy model is established for the ARM7TDMI RISC processor.
|
| Markus Knauer.
Codierungsverfahren zur Reduktion des Energiebedarfs von Programmen.
Master's Thesis, July 2001
[BibTeX][PDF]@mastersthesis { Knauer2001,
title = {Codierungsverfahren zur Reduktion des Energiebedarfs von Programmen},
author = {Knauer, Markus},
school = {Technische Universtit\"at Dortmund},
year = {2001},
month = {July},
keywords = {ecc},
file = {http://ls12-www.cs.tu-dortmund.de/daes/media/documents/theses/knauer.ps.gz},
confidential = {n},
adviser = {Stefan Steinke},
} |
| Stefan Steinke, Lars Wehmeyer and Peter Marwedel.
Energieeinsparung durch neue Compiler-Optimierungen.
Elektronik in 13/2001, pages p. 62-67
June 2001
[BibTeX][Abstract]@article { steinke:01:elektr,
author = {Steinke, Stefan and Wehmeyer, Lars and Marwedel, Peter},
title = {Energieeinsparung durch neue Compiler-Optimierungen},
journal = {Elektronik in 13/2001},
year = {2001},
pages = {p. 62-67},
month = {jun},
keywords = {ecc},
confidential = {n},
abstract = {Der Einsatz von C-Compilern verdr\"angt immer mehr die Assembler-Programmierung. Diese Tatsache kann man sich in Systemen zunutze machen, die auf niedrigen Energieverbrauch angewiesen sind. Energie-optimierende Compiler k\"onnen hier Assemblercode mit gleicher Laufzeit generieren, der weniger Energie verbraucht als der von zeitoptimierenden Compilern. Die vorgestellten Techniken k\"onnen aber auch ohne Einsatz eines Compilers dem Assembler-Programmierer M\"oglichkeiten des Energiesparens aufzeigen.},
}
Der Einsatz von C-Compilern verdrängt immer mehr die Assembler-Programmierung. Diese Tatsache kann man sich in Systemen zunutze machen, die auf niedrigen Energieverbrauch angewiesen sind. Energie-optimierende Compiler können hier Assemblercode mit gleicher Laufzeit generieren, der weniger Energie verbraucht als der von zeitoptimierenden Compilern. Die vorgestellten Techniken können aber auch ohne Einsatz eines Compilers dem Assembler-Programmierer Möglichkeiten des Energiesparens aufzeigen.
|
| Manoj Kumar Jain, Lars Wehmeyer, Stefan Steinke, Peter Marwedel and M. Balakrishnan.
Evaluating Register File Size in ASIP Design.
In CODES
Copenhagen (Denmark), April 2001
[BibTeX][PDF][Abstract]@inproceedings { jain:01:codes,
author = {Jain, Manoj Kumar and Wehmeyer, Lars and Steinke, Stefan and Marwedel, Peter and Balakrishnan, M.},
title = {Evaluating Register File Size in ASIP Design},
booktitle = {CODES},
year = {2001},
address = {Copenhagen (Denmark)},
month = {apr},
keywords = {ecc},
file = {http://ls12-www.cs.tu-dortmund.de/daes/media/documents/publications/downloads/2001-codes.pdf},
confidential = {n},
abstract = {Interest in synthesis of Application Specific Instruction Set Processors or ASIPs has increased considerably and a number of methodologies have been proposed for ASIP design. A key step in ASIP synthesis involves deciding architectural features based on application requirements and constraints. In this paper we observe the effect of changing register file size on the performance as well as power and energy consumption. Detailed data is generated and analyzed for a number of application programs. Results indicate that choice of an appropriate number of registers has a significant impact on performance.},
}
Interest in synthesis of Application Specific Instruction Set Processors or ASIPs has increased considerably and a number of methodologies have been proposed for ASIP design. A key step in ASIP synthesis involves deciding architectural features based on application requirements and constraints. In this paper we observe the effect of changing register file size on the performance as well as power and energy consumption. Detailed data is generated and analyzed for a number of application programs. Results indicate that choice of an appropriate number of registers has a significant impact on performance.
|
| Gregory Sapsford.
Messung des Energieverbrauchs von Caches am Beispiel des StrongARM-Prozessors (Studienarbeit).
Master's Thesis, March 2001
[BibTeX][PDF]@mastersthesis { Sapsford2001,
title = {Messung des Energieverbrauchs von Caches am Beispiel des StrongARM-Prozessors (Studienarbeit)},
author = {Sapsford, Gregory},
school = {Technische Universtit\"at Dortmund},
year = {2001},
month = {March},
keywords = {ecc},
file = {http://ls12-www.cs.tu-dortmund.de/daes/media/documents/theses/sapsford.ps.gz},
confidential = {n},
adviser = {Stefan Steinke},
} |
Research